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[VHDL-FPGA-VerilogVHDL-code

Description: 使用VHDL语言进行门电路,优先编码器,译码器,各进制计数器,数码管显示的编写,在QUARTUS ii上模拟可用-Gates using VHDL language, priority encoder, decoder, each binary counter, write digital display, analogue available on QUARTUS ii
Platform: | Size: 1024 | Author: lucy | Hits:

[OtherRun-length-encoder

Description: vhdl code for run length encoder
Platform: | Size: 1024 | Author: Amith | Hits:

[VHDL-FPGA-VerilogVHDL

Description: 数字电路中常用的3线-8线译码器及8线-3线优先编码器的VHDL语言的功能描述-That is commonly used in digital circuit lines to 3-8 8 line to 3 line priority encoder decoder and the function of the VHDL language description
Platform: | Size: 3072 | Author: 王宝 | Hits:

[VHDL-FPGA-VerilogPriority-encoder

Description: 用VHDL语言编程来实现优先编码器的功能。-VHDL language programming to achieve priority encoder function.
Platform: | Size: 3072 | Author: 谭莉 | Hits:

[VHDL-FPGA-Verilogbch_codeword11

Description: 3072 to 3240 vhdl encoder source code
Platform: | Size: 1024 | Author: Mojtaba | Hits:

[Modem programconvolutional-encoder

Description: In this case is a convolutional encoding code for decoding the convolutional code, using VHDL language. This code provide the method of convolutional encoding for input data. (2,1,7)
Platform: | Size: 1024 | Author: kimdaeyoung | Hits:

[Software EngineeringPRIORITY-ENCODER

Description: this the vhdl code fot 4:2 priority encoder-this is the vhdl code fot 4:2 priority encoder
Platform: | Size: 17408 | Author: asif patel | Hits:

[VHDL-FPGA-VerilogRS-encoder

Description: RSC encoder in VHDL. Hope it helpful.
Platform: | Size: 4096 | Author: thang | Hits:

[VHDL-FPGA-Verilogseven-segment-encoder

Description: 七段译码器,实现七段译码器的显示功能,使用VHDL语言写成-seven-segment encoder
Platform: | Size: 269312 | Author: hp | Hits:

[ELanguageencoder

Description: VHDL Code for D-Flip Flop & Matching Unit
Platform: | Size: 4096 | Author: Mohammed Ismail | Hits:

[Otherencoder

Description: Encoder is written in VHDL. This is simulated using ISIM and synthesized with ISE
Platform: | Size: 1024 | Author: mehdi | Hits:

[Program docConvolutional-encoder-VHDL-code-_-VHDL-Programmin

Description: convolutional encoder in vhdl
Platform: | Size: 334848 | Author: sampath | Hits:

[VHDL-FPGA-VerilogGray-code-encoder

Description: 1、 了解格雷码变换的原理。 2、 进一步熟悉QUARTUSII软件的使用方法和VHDL输入的全过程。 3、 进一步掌握实验系统的使用。 -Gray code encoder VHDL-based design
Platform: | Size: 101376 | Author: 漆广文 | Hits:

[Algorithmencoder

Description: vhdl code encoder that has a rate of half (rate = 1/2) and an example of code with its test bench
Platform: | Size: 2048 | Author: Mostafa Helal | Hits:

[VHDL-FPGA-Verilogrsencoder_latest.tar

Description: Reed Solomon Encoder
Platform: | Size: 3072 | Author: aprsc7 | Hits:

[VHDL-FPGA-Verilog1

Description: VHDL代码,一些课本的小程序。包含3线-8线译码器,4选1选择器,6层电梯,8线-3线编码器,8线-3线优先编码器,8选1,BCD-7段显示译码器真值表,半加器,摩尔状态机,数字频率计,数字时钟,序列检测器的设计,一般状态机等等。(VHDL code, some textbooks for small programs. Includes 3 -8 decoder, 4 1 selector, 6 elevator, line 8 Line 8 line -3 encoder, -3 priority encoder, 8 choose 1, BCD-7 segment display decoder truth table, half adder, Moore state machine, digital frequency meter, digital clock, sequence detector design, general state machine etc..)
Platform: | Size: 453632 | Author: zidting | Hits:

[VHDL-FPGA-Verilog2

Description: VHDL代码,一些课本的小程序。包含3线-8线译码器,4选1选择器,6层电梯,8线-3线编码器,8线-3线优先编码器,8选1,BCD-7段显示译码器真值表,半加器,摩尔状态机,数字时钟,序列检测器的设计,一般状态机等等。(VHDL code, some textbooks for small programs. It includes 3 line -8 line decoder, 4 selector 1 selector, 6 elevator, 8 line -3 encoder, 8 line -3 line priority encoder, 8 select 1, BCD-7 segment display decoder truth table, half adder, Moore state machine, digital clock, sequence detector design, general state machine and so on.)
Platform: | Size: 454656 | Author: zidting | Hits:

[VHDL-FPGA-VerilogEDA

Description: 本设计是在Quartus ii开发环境下采用VHDL语言实现的AMI/HDB3编码器课程设计。(This design is a course design of AMI / HDB3 encoder implemented by VHDL language in the development environment of Quartus II.)
Platform: | Size: 1916928 | Author: Z Yu | Hits:

[VHDL-FPGA-Verilog222

Description: VHDL BISS,SSI,ENDAT2.2, ENCODER
Platform: | Size: 36864 | Author: ancirl | Hits:

[VHDL-FPGA-Verilog5x32 encoder decoder

Description: vhdl code for 5x32 encoder decoder
Platform: | Size: 809 | Author: zia@123 | Hits:
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